1. Field of the Invention
This invention relates to a read-out circuit for a photodetector, and is particularly relevant to such circuits for use with focal plane photodetector arrays operating at infra-red (IR) wavelengths.
2. Discussion of Prior Art
Two dimensional IR photodetector arrays typically incorporate 128.times.128 photodiodes hybridised on to a silicon substrate measuring 6 mm.times.6 mm. Each photodiode responds to the integrated effect of respective incident photons by creating a charge of measurable magnitude which is converted to a current or voltage signal by electronic circuitry located on the same substrate. The signals from each photodiode are subsequently fed via a multiplexer to remote electronic circuitry for further processing.
Each photodiode of such an array has an associated MOS (metal-oxide-semiconductor) transistor, which transfers the photocharge from the respective photodiode to an associated precharged storage capacitor. The current flowing through each photodiode in response to incident IR radiation is then allowed to discharge its respective capacitor for a fixed time interval. The voltages remaining on the capacitors are then transferred via a multiplexer to remote signal processing circuitry. The capacitors are recharged and the process is repeated.
The output signal from a DC coupled IR detector array is normally composed of the wanted signal comprising the fine detail of the scene under surveillance superimposed upon a background "pedestal" signal. The pedestal can be a factor of one thousand or more larger than the wanted signal. It is likely to have a different value for each photodiode owing to, for example, variations in the cut-off wavelength. Photodiode arrays are normally operated under reverse diode bias. This results in a leakage current contribution to the photodiode output signal.
The presence of the unwanted pedestal and leakage signals imposes constraints and limitations on the design and performance of any detector array read-out circuitry. For example, the remote processing circuitry requires a large dynamic range (typically 12 bits) so that it may handle both the wanted signal and the unwanted pedestal. Also, since photocharge is integrated on the focal plane, a large fraction of the available storage capacity is used to store the pedestal charge, leaving less capacity for the wanted signal and thus degrading performance.